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10.7 A 105GOPS 36mm2 heterogeneous SDR MPSoC with energy-aware dynamic scheduling and iterative detection-decoding for 4G in 65nm CMOS

Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review

Contributors

B. Noethen - , Vodafone Chair of Mobile Communications Systems (Author)
O. Arnold - , Vodafone Chair of Mobile Communications Systems (Author)
E. Perez Adeva - , Vodafone Chair of Mobile Communications Systems (Author)
T. Seifert - , Vodafone Chair of Mobile Communications Systems (Author)
E. Fischer - , Vodafone Chair of Mobile Communications Systems (Author)
S. Kunze - , Institute of Lightweight Engineering and Polymer Technology (Author)
E. Matus - , Vodafone Chair of Mobile Communications Systems (Author)
Gerhard Fettweis - , Faculty of Computer Sciences, Vodafone Chair of Mobile Communications Systems (Author)
Holger Eisenreich - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Georg Ellguth - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Stephan Hartmann - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Sebastian Höppner - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Stefan Schiefer - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Jens-Uwe Schlüßler - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Stefan Scholze - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Dennis Walter - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
René Schüffny - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)

Details

Original language	English
Title of host publication	2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)
Publisher	IEEE Xplore
Pages	188-189
Number of pages	2
ISBN (electronic)	978-1-4799-0920-9
ISBN (print)	978-1-4799-0918-6
Publication status	Published - 1 Feb 2014
Peer-reviewed	Yes

Publication series

Series	IEEE International Conference on Solid-State Circuits (ISSCC)

External IDs

Scopus	84898079313

Keywords

Keywords

4G mobile communication, CMOS integrated circuits, iterative decoding, multiprocessing systems, processor scheduling, system-on-chip, ASIC, ASIP, CMOS, CoreManager, Tomahawk2 MPSoC, application specific hardware unit, design constraints, dynamic scheduler, energy-aware dynamic scheduling, general purpose processor, heterogeneous SDR MPSoC, hierarchical power management, iterative detection decoding, power efficiency, power gating, processing elements, processing performance, runtime scheduling, size 65 nm, Baseband, Computer architecture, Dynamic scheduling, Engines, Forward error correction, MIMO, Reduced instruction set computing

Library keywords

620 Engineering and allied operations