Special Session: Mitigating Side-Channel Attacks Through Circuit to Application Layer Approaches
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
Side-Channel Attacks (SCAs), which are always considered a severe threat to the security of the cryptographic circuits, today can also be employed to extract IP secrets and neural network models. Hence, developing novel security solutions at different design levels is crucial. In this paper, we explore recent countermeasures at the circuit, algorithmic, and microarchitecture levels. First, we explain how Reconfigurable Field-Effect Transistor (RFET), as a beyond CMOS technology, enables us to provide both IP and data protection against SCAs at the circuit level. Second, we investigate an automated method for generating masked circuits as an algorithmic solution, and then we review machine learning-based SCA detection mechanisms at the microarchitecture level. Finally, we discuss emerging threats of SCAs from the industrial point of view.
Details
Originalsprache | Englisch |
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Titel | Proceedings - 2023 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2023 |
Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers Inc. |
Seiten | 8-17 |
Seitenumfang | 10 |
ISBN (elektronisch) | 9798400702891 |
Publikationsstatus | Veröffentlicht - 2023 |
Peer-Review-Status | Ja |
Publikationsreihe
Reihe | International Conference on Hardware/Software Codesign and System Synthesis (CODES) |
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Konferenz
Titel | 2023 ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis |
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Kurztitel | CODES+ISSS 2023 |
Dauer | 17 - 22 September 2023 |
Webseite | |
Bekanntheitsgrad | Internationale Veranstaltung |
Stadt | Hamburg |
Land | Deutschland |
Externe IDs
ORCID | /0000-0003-3814-0378/work/150330862 |
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Schlagworte
ASJC Scopus Sachgebiete
Schlagwörter
- Emerging technology, Hardware security, Masking, Side-channel analysis