XNoC: A non-intrusive TDM circuit-switched Network-on-Chip

Research output: Contribution to book/conference proceedings/anthology/reportConference contributionContributedpeer-review

Contributors

Abstract

Network-on-Chip (NoC) is known as a scalable and high performance interconnect in Systems-on-Chip (SoCs) with multiple processing elements (PEs). Recently, the design paradigm of SoCs has shifted from static to dynamic runtime reconfigurable system. In these systems, the PEs can be loaded/unloaded on demand. Therefore, the NoC should be able to adapt as quickly as possible to the changes to maintain the performance of the systems. In this work, we present a non-intrusive runtime reconfigurable time-division-multiplexed circuit-switched NoC, XNoC, which offers the following benefits (1) it switches between different routes within a predictable latency that is strictly determined by the length of the route and the number of time slots; (2) the configuration process can be masked effectively by overlapping with communication and (3) the multi-cast service is supported with aggregate feedback from sink nodes. We propose an XSwitch which requires 3.5X less resource than the conventional switch with similar features. The overall resource cost of XNoC is also smaller than the most known NoC and the clock timing is up to 50% better. We also propose a novel distributed control plane to accelerate the reconfiguration process and to improve the scalability of NoC. The achieved reconfiguration speedup compared to the centralized control unit is up to 7.6X in certain conditions. On average, it takes only 74 clock cycles to activate a 12-hop connection.

Details

Original languageEnglish
Title of host publication2016 - 26th International Conference on Field-Programmable Logic and Applications
PublisherIEEE Xplore
Number of pages11
ISBN (electronic)9782839918442
ISBN (print)978-1-5090-0851-3
Publication statusPublished - 26 Sept 2016
Peer-reviewedYes

Publication series

SeriesInternational Conference on Field Programmable Logic and Applications (FPL)
ISSN1946-147X

Conference

Title2016 26th International Conference on Field Programmable Logic and Applications
Abbreviated titleFPL 2016
Conference number26
Duration29 August - 2 September 2016
Website
LocationSwissTech Convention Centre
CityLausanne
CountrySwitzerland

Keywords

Research priority areas of TU Dresden

Keywords

  • distributed control, FPGA, multi-cast, NoC, TDM

Library keywords