The current and future increase of computer performance is driven by raising the number of cores on a single chip and within a supercomputer. As a consequence, applications need to harness much higher degrees of parallelism in order to satisfy their growing demands for computing power. Writing code that runs correctly and efficiently on large numbers of processors and cores is extraordinarily challenging. The increased concurrency levels also place higher demands on the development process and thus require adequate and scalable tool support for debugging and performance analysis. This workshop serves as a forum for discussing methods and experiences related to scalability and usability of HPC programming tools, including integration with compilers and the overall development environment.