To meet low response time and high throughput demands, data processing architectures are continuously evolving by adapting novel hardware features.
For instance, these systems already shifted from disk-oriented to main memory-oriented architectures to efficiently exploit the ever-increasing capacities of DRAM.
In addition to regular DRAM, we are currently seeing the development of emerging memory technologies such as very large caches or high-bandwidth memory.
These specific kinds of technologies usually offer higher bandwidth but have a much lower capacity compared to regular DRAM.
To transparently leverage these technologies for data processing acceleration, we envision an enhanced OS-driven memory allocation interface, that should, depending on user provided estimations, select the best suited memory technology.