Transactional Memory for Dependable Embedded Systems (Poster)
Research output: Contribution to conferences › Poster › Contributed
Contributors
Abstract
Transactional Memory (TM) has been touted as one of the most promising approaches to concurrent programming for multi-core processors. By combining ease of use with high scalability potential, as well as checkpointing capabilities particularly useful for developing dependable software, TM has attracted considerable attention from the research community. Many of its facets have been studied over the last few years: hardware support, software TM runtimes, operating system extensions, transactional compilers, language extensions, or application workloads. On the basis of our experiences as designers and users of a complete TM stack that we developed over the last five years, we discuss in this position paper our view on the challenges one faces when extending TM to dependable embedded systems. Indeed, there is an apparent contradiction between the optimistic, best-effort operation of TM and the strict dependability requirements of embedded systems. Our position is that it is both possible and worthwhile to develop embedded transactional memory. Yet, we believe that in the context of dependable embedded systems the focus of TM should be on failure control and not concurrency control. Hence, this will require modifications of the TM language primitives, tools, algorithms, runtime systems, and hardware itself.
Details
Original language | English |
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Number of pages | 1 |
Publication status | Published - 2011 |
Peer-reviewed | No |
Workshop
Title | 7th Workshop on Hot Topics in System Dependability 2011 |
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Abbreviated title | HotDep'11 |
Conference number | 7 |
Duration | 27 June 2011 |
Website | |
Degree of recognition | International event |
Location | Sheraton Hong Kong Hotel & Towers |
City | Hong Kong |
Country | China |