Towards Complete Open-Source Environments: FPGA-Based GPU Overlay Controlled by RISC-V

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Hector Gerardo Muñoz-Hernandez - , Brandenburg University of Technology Cottbus-Senftenberg (Author)
  • Muhammad Ali - , Chair of Adaptive Dynamic Systems (Author)
  • Keyvan Shahin - , Brandenburg University of Technology Cottbus-Senftenberg (Author)
  • Alireza Siyavashi - , Brandenburg University of Technology Cottbus-Senftenberg (Author)
  • Diana Göhringer - , Chair of Adaptive Dynamic Systems (Author)
  • Marc Reichenbach - , University of Rostock (Author)
  • Christian Herglotz - , Brandenburg University of Technology Cottbus-Senftenberg (Author)
  • Michael Hübner - , Brandenburg University of Technology Cottbus-Senftenberg (Author)

Abstract

Image and signal processing applications have been widely implemented in Field Programmable Gate Arrays (FPGAs) and Graphical Processing Units (GPUs) due to their energy efficiency and performance, respectively. GPUs provide high data processing parallelism and are usually chosen to accelerate applications where low energy consumption is not a high priority. On the other hand, FPGAs are more tailored to hardware solutions due to their reconfigurability, but they struggle to outperform GPUs in data throughput. Soft IP cores implemented on reconfigurable hardware, are an alternative offering advantages from both worlds. Some of these soft-core solutions offer an entire environment that includes scripts to automate their implementation, custom compilers, and other diverse tools. Unfortunately, some of these soft-cores are dependent on proprietary Intellectual Property (IP) or require hardware expertise to use properly. In this work, we propose an extended version of a popular open-source soft GPU, which can now run alongside a soft RISC-V core, and with High-Bandwidth memory (HBM2) compatibility. Previously, this soft GPU was only ready to be deployed in boards with a hard ARM core, but now it can be easily used in FPGAs without this requirement. We also provide an evaluation of how the soft GPU performs with respect to the pure RISC-V core, and a hard ARM core achieving geometric mean speed-ups of 114.60x and 19.72x respectively when performing some image and signal processing applications. Finally, we demonstrate how our soft GPU benefits from the HBM integration.

Details

Original languageEnglish
Title of host publicationArchitecture of Computing Systems - 38th International Conference, ARCS 2025, Proceedings
EditorsSven Tomforde, Christian Krupitzer, Stéphane Vialle, Estela Suarez, Thilo Pionteck
PublisherSpringer Science and Business Media B.V.
Pages94-108
Number of pages15
ISBN (electronic)978-3-032-03281-2
ISBN (print)978-3-032-03280-5
Publication statusE-pub ahead of print - Oct 2025
Peer-reviewedYes

Publication series

SeriesLecture Notes in Computer Science
Volume15839 LNCS
ISSN0302-9743

Conference

Title38th International Conference on Architecture of Computing Systems
SubtitleMastering novel HPC chip architectures
Abbreviated titleARCS 2025
Conference number38
Duration22 - 24 April 2025
Website
LocationWissenschaftszentrum Kiel
CityKiel
CountryGermany

External IDs

ORCID /0000-0003-2571-8441/work/214453710

Keywords

Sustainable Development Goals

Keywords

  • FPGA, HBM, RISC-V, Soft-core GPU, System-On-Chip