In this paper the design of a VCSEL driver with strong equalization is presented. Unlike other published works the pre-emphasis provided from the proposed driver and the output voltage swing are independently tunable up to the saturation of the output stage (∼700 mV_pp in 50 load environment). The driver is designed in 130 nm SiGe BiCMOS technology. Thanks to the various bandwidth extension techniques, the electrical data-rate at which the driver can operate is higher than 50 Gbit/s. A wide open optical eye diagram is measured at 48 Gbit/s with a 20 GHz VCSEL. The driver and the VCSEL consume only 188 mW from a dual voltage supply of 2.5 and 3.4 V. To the best of the authors knowledge 3.9 mW/(Gbit/s) is the highest reported energy-efficiency for a common-cathode VCSEL driver with data-rate higher than 40 Gbit/s. Moreover an open eye at 48 Gbit/s is the fastest reported for a common cathode VCSEL driver without pre-emphasis in the receiver.