Temperature aware energy-reliability trade-offs for mapping of throughput-constrained applications on multimedia MPSoCs
Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review
Contributors
Abstract
This paper proposes a design-time (offline) analysis technique to determine application task mapping and scheduling on a multiprocessor system and the voltage and frequency levels of all cores (offline DVFS) that minimize application computation and communication energy, simultaneously minimizing processor aging. The proposed technique incorporates (1) the effect of the voltage and frequency on the temperature of a core; (2) the effect of neighboring cores' voltage and frequency on the temperature (spatial effect); (3) pipelined execution and cyclic dependencies among tasks; and (4) the communication energy component which often constitutes a significant fraction of the total energy for multimedia applications. The temperature model proposed here can be easily integrated in the design space exploration for multiprocessor systems. Experiments conducted with MPEG-4 decoder on a real system demonstrate that the temperature using the proposed model is within 5% of the actual temperature clearly demonstrating its accuracy. Further, the overall optimization technique achieves 40% savings in energy consumption with 6% increase in system lifetime.
Details
Original language | English |
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Title of host publication | 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE) |
Place of Publication | Dresden |
Publisher | IEEE Xplore |
ISBN (print) | 978-3-9815370-2-4 |
Publication status | Published - 2014 |
Peer-reviewed | Yes |
Externally published | Yes |
Publication series
Series | Design, Automation and Test in Europe Conference and Exhibition (DATE) |
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ISSN | 1530-1591 |
Conference
Title | 17th Design, Automation and Test in Europe, DATE 2014 |
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Duration | 24 - 28 March 2014 |
City | Dresden |
Country | Germany |