Static frequency divider circuitry

Research output: Intellectual property › Patent application/Patent

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Abstract

The present invention relates to a static frequency divider circuitry comprising a delay flip-flop related structure. An object of the present invention is to design a frequency divider circuitry that meets upcoming low power requirements without introducing special design constrains, working at supply voltage significantly lower than 3.0V and operation frequencies comparable to the current state of the art. This object is achieved through providing a static frequency comprising a delay flip-flop related structure including a master part and a slave part being operated by clock transistors arranged as emitter followers of the common collector transistors, combined to control both the master part and the slave part of the frequency divider by sharing one clock switch and one inverse clock switch and a latching unit being either a virtual latching unit capable to temporarily store charges or a real latching unit consisting of proper latching devices.

Details

The present invention relates to a static frequency divider circuitry comprising a delay flip-flop related structure. An object of the present invention is to design a frequency divider circuitry that meets upcoming low power requirements without introducing special design constrains, working at supply voltage significantly lower than 3.0V and operation frequencies comparable to the current state of the art. This object is achieved through providing a static frequency comprising a delay flip-flop related structure including a master part and a slave part being operated by clock transistors arranged as emitter followers of the common collector transistors, combined to control both the master part and the slave part of the frequency divider by sharing one clock switch and one inverse clock switch and a latching unit being either a virtual latching unit capable to temporarily store charges or a real latching unit consisting of proper latching devices.

Original languageEnglish
IPC (International Patent Classification)H03K 3/ 289 A I
Patent numberWO2011036212A1
Country/TerritoryGermany
Priority date24 Sept 2009
Priority numberEP20090171161
Publication statusPublished - 31 Mar 2011
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Keywords

Research priority areas of TU Dresden