Software compilation techniques for MPSoCs

Research output: Contribution to book/Conference proceedings/Anthology/ReportChapter in book/Anthology/ReportContributedpeer-review

Contributors

  • Rainer Leupers - , RWTH Aachen University (Author)
  • Weihua Sheng - , RWTH Aachen University (Author)
  • Jeronimo Castrillon - , RWTH Aachen University (Author)

Abstract

The increasing demands such as high-performance and energy-efficiency for future embedded systems result in the emerging of heterogeneous Multiprocessor System-on-Chip (MPSoC) architectures. To fully enable the power of those architectures, new tools are needed to take care of the increasing complexity of the software to achieve high productivity. An MPSoC compiler is the tool-chain to tackle the problems of expressing parallelism in applications' modeling/programming, mapping/scheduling and generating the software to distribute on an MPSoC platform for efficient usage, for a given (pre-)verified MPSoC platform. This chapter talks about the various aspects ofMPSoC compilers for heterogeneous MPSoC architectures, using a comparison to the well-established uni-processor C compiler technology. After a brief introduction to MPSoC and MPSoC compilers, the important ingredients of the compilation process, such as programming models, granularity and partitioning, platform description, mapping/scheduling and codegeneration, are explained in detail. As the topic is relatively young, a number of case studies from academia and industry are selected to illustrate the concepts at the end of this chapter.

Details

Original languageEnglish
Title of host publicationHandbook of Signal Processing Systems
PublisherSpringer Verlag, New York
Pages1215-1257
Number of pages43
ISBN (electronic)9781461468592
ISBN (print)9781461468585
Publication statusPublished - 1 Jan 2013
Peer-reviewedYes
Externally publishedYes

External IDs

ORCID /0000-0002-5007-445X/work/141545586

Keywords

Research priority areas of TU Dresden

Sustainable Development Goals