Smoothing Disruption Across the Stack: Tales of Memory, Heterogeneity, & Compilers
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
Multiple research vectors represent possible paths to improved energy and performance metrics at the application-level. There are active efforts with respect to emerging logic devices, new memory technologies, novel interconnects, and heterogeneous integration architectures. Of great interest is quantifying the potential impact of a given solution to prioritize research vectors accordingly. In this paper, we discuss two efforts - one focused on emerging memory technology, and another focused on heterogeneous integration technology - that speak to best practices for, and needed contributions from the design automation (DA) community to explore this vast design space. Furthermore, we highlight new research efforts that aim to develop the novel compiler abstractions and frameworks that are ultimately needed to derive maximum value from new memory and/or heterogeneous and monolithic integration architecture, and that can also play an important role with respect to design space exploration efforts.
Details
| Original language | English |
|---|---|
| Title of host publication | 2024 Design, Automation and Test in Europe Conference and Exhibition, DATE 2024 - Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| ISBN (electronic) | 9798350348590 |
| Publication status | Published - 2024 |
| Peer-reviewed | Yes |
Publication series
| Series | Proceedings -Design, Automation and Test in Europe, DATE |
|---|---|
| ISSN | 1530-1591 |
Conference
| Title | 2024 Design, Automation and Test in Europe Conference and Exhibition |
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| Abbreviated title | DATE 2024 |
| Conference number | 27 |
| Duration | 25 - 27 March 2024 |
| Website | |
| Location | Palacio De Congresos De Valencia |
| City | Valencia |
| Country | Spain |
External IDs
| ORCID | /0000-0002-5007-445X/work/173985260 |
|---|---|
| ORCID | /0000-0001-9295-3519/work/191041736 |
Keywords
ASJC Scopus subject areas
Keywords
- associative memory, chiplet, compilers, Compute-in-memory, cross-bar architectures, distance functions, ferroelectric field effect transistors (FeFETs), heterogeneous integration, pathfinding