Scheduling of Hardware Tasks in Reconfigurable Mixed-Criticality Systems

Research output: Contribution to book/conference proceedings/anthology/reportConference contributionContributedpeer-review

Abstract

FPGA virtualization allows the shared usage of an FPGA by several operating systems with different criticality levels. To avoid mutual interference, most state-of-the-art systems strictly isolate subsystems in spatial respect at the expense of lower resource utilization. We present an allocation and scheduling strategy for hardware tasks that improves resource utilization while respecting different real-time levels (hard, soft, and no real-time) of guest operating systems. To not jeopardize deadlines, Dynamic Partial Reconfiguration (DPR) latencies are reduced by reusing, prefetching and reserving of hardware accelerators. Compared with an existing scheduler for hardware tasks, we could increase the resource usage by 156% while deadline misses were reduced by 6%.

Details

Original languageEnglish
Title of host publication2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
Number of pages1
Publication statusPublished - 6 Jun 2022
Peer-reviewedYes

Conference

Title2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines
Abbreviated titleFCCM
Conference number
Duration15 - 18 May 2022
Website
Location
CityNew York
CountryUnited States

External IDs

ORCID /0000-0001-5005-0928/work/131190580
Scopus 85133227418
ORCID /0000-0003-2571-8441/work/142240559

Keywords

Research priority areas of TU Dresden

DFG Classification of Subject Areas according to Review Boards