Run-time mapping for reliable many-cores based on energy/performance trade-offs
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
This paper presents a run-time resource manager for NoC-based many-core architectures that dynamically determines the most effective mapping of tasks on the processing nodes of the architecture to optimize system reliability while leveraging on performance and communication energy. An adaptive engine is exploited to pursue the given optimization goal taking into account various metrics. Experimental results for a set of benchmarks show that the adaptive engine (with MTTF optimization only) achieves 16% improvement in MTTF with respect to static pre-computed mapping at a reasonable communication energy overhead of 10%. Further, with MTTF and energy optimization engine turned-on, the adaptive engine is able to minimize communication energy consumption by 50% while exploiting the available MTTF slack.
Details
Original language | English |
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Title of host publication | 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) |
Place of Publication | New York |
Publisher | IEEE Xplore |
Pages | 58-64 |
Number of pages | 7 |
ISBN (electronic) | 978-1-4799-1585-9, 978-1-4799-1583-5 |
Publication status | Published - 2013 |
Peer-reviewed | Yes |
Externally published | Yes |
Publication series
Series | IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems |
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ISSN | 1550-5774 |
Conference
Title | 2013 26th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013 |
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Duration | 2 - 4 October 2013 |
City | New York City, NY |
Country | United States of America |