RETRO: Mitigating Power Side-Channel Attacks with Reconfigurable RFET-based Ring Oscillators
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
- Transregio 404: Next Generation Electronics With Active Devices in Three Dimensions
Abstract
Power side-channel attacks are among the most effective physical attacks, threatening the security of circuits such as cryptographic circuits by exploiting information leakage from their physical implementation. Among various masking and hiding countermeasures that have been proposed, Ring Oscillator (RO)-based solutions are considered low-overhead circuitry addons that can be integrated into different circuits to hide the data dependency of power consumption by adding noise to their power signatures. The Three-Independent-Gate Reconfigurable Field-Effect Transistor (TIG-RFET) is an emerging technology that offers runtime reconfigurability between N-type and P-type operation, supports both low-VT and high-VT modes, and provides an internal wired-AND function, making it a strong candidate for efficient implementation of various hardware security methods. In this paper, we propose a novel reconfigurable RFET-based RO that provides controllable frequency through RFET-based inverters with reconfigurable delay. Using these ROs, we introduce a countermeasure called RETRO, which can generate noise by varying both the amplitude and frequency of power consumption. To evaluate the efficacy of RETRO, we applied it to the Piccolo S-box, a lightweight cryptographic circuit, and simulation results demonstrate that it effectively enhances resilience against Correlation Power Analysis (CPA). Furthermore, we show that reconfigurable frequency broadens the noise spectrum, making filtering considerably more difficult.
Details
| Original language | English |
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| Title of host publication | 2026 Design, Automation and Test in Europe Conference, DATE 2026 - Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Pages | 1-7 |
| ISBN (electronic) | 978-3-9826741-1-7 |
| ISBN (print) | 979-8-3315-4565-9 |
| Publication status | Published - Jun 2026 |
| Peer-reviewed | Yes |
Publication series
| Series | Proceedings -Design, Automation and Test in Europe, DATE |
|---|---|
| ISSN | 1530-1591 |
Conference
| Title | 2026 Design, Automation and Test in Europe Conference |
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| Abbreviated title | DATE 2026 |
| Conference number | 39 |
| Duration | 20 - 22 April 2026 |
| Website | |
| Location | Palazzo della Gran Guardia |
| City | Verona |
| Country | Italy |
Keywords
Research priority areas of TU Dresden
ASJC Scopus subject areas
Keywords
- Correlation Power Analysis, Hardware security, RFET, Side-channel attack