Quasi-Static Scheduling for Deterministic Timed Concurrent Models on Multi-Core Hardware

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

  • Shaokai Lin - , University of California at Berkeley (Author)
  • Erling Jellum - , University of California at Berkeley (Author)
  • Mirco Theile - , Technical University of Munich (Author)
  • Tassilo Tanneberger - , Chair of Compiler Construction (cfaed) (Author)
  • Binqi Sun - , Technical University of Munich (Author)
  • Chadlia Jerad - , University of Manouba (Author)
  • Yimo Xu - , University of California at Berkeley (Author)
  • Guangyu Feng - , University of California at Berkeley (Author)
  • Magnus Mæhlum - , Norwegian University of Science and Technology (Author)
  • Jian Jia Chen - , Dortmund University of Technology (Author)
  • Martin Schoeberl - , Technical University of Denmark (Author)
  • Linh Thi Xuan Phan - , University of Pennsylvania (Author)
  • Jeronimo Castrillon - , Chair of Compiler Construction (cfaed) (Author)
  • Sanjit A. Seshia - , University of California at Berkeley (Author)
  • Edward A. Lee - , University of California at Berkeley (Author)

Abstract

To design performant, expressive, and reliable cyber-physical systems (CPSs), researchers extensively perform quasi-static scheduling for concurrent models of computation (MoCs) on multi-core hardware. However, these quasi-static scheduling approaches are developed independently for their corresponding MoCs, despite commonality in the approaches. To help generalize the use of quasi-static scheduling to new and emerging MoCs, this article proposes a unified approach for a class of deterministic timed concurrent models (DTCMs), including prominent models such as synchronous dataflow (SDF), Boolean-controlled dataflow (BDF), scenario-aware dataflow (SADF), and Logical Execution Time (LET). In contrast to scheduling techniques tailored exclusively to specific MoCs, our unified approach leverages a common intermediate formalism called state space finite automata (SSFA), bridging the gap between high-level MoCs and executable schedules. Once identified as DTCMs, new MoCs can directly adopt SSFA-based scheduling, significantly easing adoption. We show that quasi-static schedules facilitated by SSFA are provably free from timing anomalies and enable straightforward worst-case makespan analysis. We demonstrate the approach using the reactor model—an emerging discrete-event MoC—programmed using the Lingua Franca (LF) language. Experiments show that quasi-statically scheduled LF programs exhibit lower runtime overhead compared to the dynamically scheduled LF programs, and that the analyzable worst-case makespans enable compile-time deadline checking.

Details

Original languageEnglish
Article number150
JournalACM transactions on embedded computing systems
Volume24
Issue number5
Publication statusPublished - 1 Oct 2025
Peer-reviewedYes

External IDs

ORCID /0000-0002-5007-445X/work/206632719

Keywords

ASJC Scopus subject areas

Keywords

  • Concurrency, DAG Scheduling, Predictability, Quasi-Static Scheduling