Power measurement techniques on standard compute nodes: A quantitative comparison
Research output: Contribution to conferences › Paper › Contributed › peer-review
Contributors
Abstract
Energy efficiency is of steadily growing importance in virtually all areas from mobile to high performance computing. Therefore, lots of research projects focus on this topic and strongly rely on power measurements from their test platforms. The need for finer grained measurement data-both in terms of temporal and spatial resolution (component breakdown)-often collides with very rudimentary measurement setups that rely e.g., on non-professional power meters, IMPI based platform data or model-based interfaces such as RAPL or APM. This paper presents an in-depth study of several different AC and DC measurement methodologies as well as model approaches on test systems with the latest processor generations from both Intel and AMD. We analyze most important aspects such as signal quality, time resolution, accuracy, and measurement overhead and use a calibrated, professional power analyzer as our reference.
Details
Original language | English |
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Pages | 194-204 |
Number of pages | 11 |
Publication status | Published - 2013 |
Peer-reviewed | Yes |
External IDs
Scopus | 84881394933 |
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ORCID | /0000-0002-8491-770X/work/141543268 |
ORCID | /0009-0003-0666-4166/work/151475560 |
ORCID | /0000-0002-5437-3887/work/154740492 |
Keywords
Sustainable Development Goals
Keywords
- power, techniques