Optimized communication architecture of MPSoCs with a hardware scheduler: A system-level analysis
Research output: Contribution to book/Conference proceedings/Anthology/Report › Chapter in book/Anthology/Report › Contributed › peer-review
Contributors
Abstract
Efficient runtime resource management in multi-processor systems-on-chip (MPSoCs) for achieving high performance and low energy consumption is one of the key challenges for system designers. OSIP, an operating system application-specific instruction-set processor, together with its well-defined programming model, provides a promising solution. It delivers high computational performance to deal with dynamic task scheduling and mapping. Being programmable, it can easily be adapted to different systems. However, the distributed computation among the different processing elements introduces complexity to the communication architecture, which tends to become the bottleneck of such systems. In this work, the authors highlight the vital importance of the communication architecture for OSIP-based systems and optimize the communication architecture. Furthermore, the effects of OSIP and the communication architecture are investigated jointly from the system point of view, based on a broad case study for a real life application (H.264) and a synthetic benchmark application.
Details
Original language | English |
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Title of host publication | Adoption and Optimization of Embedded and Real-Time Communication Systems |
Publisher | IGI Global |
Pages | 163-180 |
Number of pages | 18 |
ISBN (electronic) | 9781466627772 |
ISBN (print) | 9781466627765 |
Publication status | Published - 31 Jan 2013 |
Peer-reviewed | Yes |
Externally published | Yes |
External IDs
ORCID | /0000-0002-5007-445X/work/141545587 |
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