Network Adapter for Secure Networks-on-Chip
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
This work explores the security challenges presented by Hardware Trojans (HTs) in Network-on-Chip (NoC) and Multiprocessor System-on-Chip (MPSoC) architectures. It proposes a Network Adapter (NA) approach to mitigate these risks, thereby enhancing the security and reliability of the overall system. The NA uses Authenticated Encryption to maintain confidentiality and ensure packet integrity. In addition, retransmissions recover corrupted or deleted packets, allowing a compromised system with an HT to remain operational. The goal of this paper is to provide insights into the potential benefits and challenges of adding such NA and thus contribute to the development of secure NoC and MPSoCs for future embedded systems.
Details
| Original language | English |
|---|---|
| Title of host publication | 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) |
| Pages | 192 |
| Number of pages | 1 |
| ISBN (electronic) | 979-8-3503-6460-6 |
| Publication status | Published - Jul 2024 |
| Peer-reviewed | Yes |
External IDs
| ORCID | /0000-0003-2571-8441/work/190571647 |
|---|---|
| ORCID | /0000-0002-8604-0139/work/190572048 |
| Scopus | 85200745439 |
Keywords
ASJC Scopus subject areas
Keywords
- Lightweight Encryption, MPSoC, Network Adapter, Network-on-Chip, Security