Near-memory Computing on FPGAs with 3D-stacked Memories: Applications, Architectures, and Optimizations

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

Abstract

The near-memory computing (NMC) paradigm has transpired as a promising method for overcoming the memory wall challenges of future computing architectures. Modern systems integrating 3D-stacked DRAM memory can be leveraged to prevent unnecessary data movement between the main memory and the CPU. FPGA vendors have started introducing 3D memories to their products in an effort to remain competitive on bandwidth requirements of modern memory-intensive applications. Recent NMC proposals target various types of data processing workloads such as graph processing, MapReduce, sorting, machine learning, and database analytics.In this article, we conduct a literature survey on previous proposals of NMC systems on FPGAs integrated with 3D memories. By leveraging the high bandwidth offered from such memories together with specifically designed hardware, FPGA architectures have become a competitor to GPU solutions in terms of speed and energy efficiency. Various FPGA-based NMC designs have been proposed with software and hardware optimization methods to achieve high performance and energy efficiency. Our review investigates various aspects of NMC designs such as platforms, architectures, workloads, and tools. We identify the key challenges and open issues with future research directions.

Details

Original languageEnglish
Article number16
JournalACM Transactions on Reconfigurable Technology and Systems
Volume16
Issue number1
Publication statusPublished - 22 Dec 2022
Peer-reviewedYes

External IDs

ORCID /0000-0003-2571-8441/work/159607563

Keywords

Sustainable Development Goals

ASJC Scopus subject areas

Keywords

  • 3D stacking, FPGA architectures, high-bandwidth memory, Near-memory computing