NC-Library: Expanding SystemC Capabilities for Nested reConfigurable Hardware Modelling

Research output: Contribution to journalResearch articleContributedpeer-review


As runtime reconfiguration is used in an increasing number of hardware architectures, new simulation and modeling tools are needed to support the developer during the design phases. In this article, a language extension for SystemC is presented, together with a design methodology for the description and simulation of dynamically reconfigurable hardware at different levels of abstraction. The library presented offers a high degree of flexibility in the description of reconfiguration features and their management, while allowing runtime reconfiguration simulation, removal, and replacement of custom modules as well as third-party components throughout the architecture development process. In addition, our approach supports the emerging concept of nested reconfiguration and split regions with a minimal simulation overhead of a maximum of three delta cycles for signal and transaction forwarding, and four delta cycles for the reconfiguration process.


Original languageEnglish
JournalACM Transactions on Reconfigurable Technology and Systems
Issue number1
Early online date27 Apr 2024
Publication statusE-pub ahead of print - 27 Apr 2024

External IDs

ORCID /0000-0003-2571-8441/work/159607519
ORCID /0000-0001-5005-0928/work/159607675
ORCID /0000-0002-8604-0139/work/159607783
Mendeley ed8164fe-e0cf-3ba8-8ccb-a7979e3c1379