Multi-grained performance estimation for MPSoC compilers: Work-in-progress
Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review
Contributors
Abstract
Parallelizing compilers are a promising solution to tackle key challenges of MPSoC programming. One fundamental aspect foraprofitable parallelization is to estimate the performance of the applications on the target platforms. There is a wide range of state-of-theart performance estimation techniques, such as, simulation-based, measurement-based, among others. They provide performance estimates typically only at function or basic block granularity. However, MPSoC compilers require performance information at other granularities, such as statement, loopor even arbitrary code blocks. In this paper, we propose a framework to adapt performance information sources to any granularity required by an MPSoC compiler.
Details
Original language | English |
---|---|
Title of host publication | CASES '17: Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion |
Publisher | Association for Computing Machinery (ACM), New York |
ISBN (electronic) | 978-1-4503-5184-3 |
Publication status | Published - 15 Oct 2017 |
Peer-reviewed | Yes |
Publication series
Series | ESWEEK: Embedded Systems Week (CASES) |
---|
Conference
Title | 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2017 |
---|---|
Duration | 15 - 20 October 2017 |
City | Seoul |
Country | Korea, Republic of |
External IDs
ORCID | /0000-0002-5007-445X/work/141545554 |
---|