Model-based Approach for Automatic Generation of Hardware Architectures for Robotics

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

Abstract

Increasingly complex robotic platforms incorporate heterogeneous sensors and actuators. They are usually coupled with embedded computers but relying on software solutions not entirely suited for processing large amount of data concurrently and fast enough to keep real-time constrains. FPGAs are ideal candidates to enhance those systems computing capabilities while still being programmable. However, it is cumbersome to manually incorporate them into new or existing systems because providing accelerators with a specific integration capability limits their applicability. This work presents an approach to integrate multiple hardware accelerators into a robotic system. A model-based toolchain automatically generates the necessary hardware components (VHDL modules) from existing message specifications to exchange data with the accelerators. The goal is to seamlessly replace software components with FPGA-based ones while retaining the same communication interface. Instead of writing several hundred lines of VHDL, a dozen input specification lines are sufficient with our approach. The results are validated through an evaluation of all message specifications included in the latest Robot Operating System (ROS) versions. The 2295 messages evaluated show the robustness in our capabilities to support arbitrarily large ROS messages types, multiple data types, and nested messages. Moreover, our approach facilitates the extension from ROS1 to provide support for ROS2 easily. Finally, two use cases are shown to prove the feasibility of our approach on real applications. The first one incorporates a hardware accelerator for image processing obtained by High Level Synthesis (HLS) into an existing software architecture. The second one consists of a fully FPGA-based mobile platform with ROS features incorporated.

Details

Original languageEnglish
Pages (from-to)140921-140937
Number of pages17
JournalIEEE Access
Volume9
Publication statusPublished - 2021
Peer-reviewedYes

External IDs

Scopus 85117066611
ORCID /0000-0003-2571-8441/work/142240508
ORCID /0000-0002-3247-0264/work/142248592
Mendeley 739ecfed-9965-3ada-b089-c01f294e1f57
ORCID /0000-0002-3513-6448/work/168720153

Keywords

Keywords

  • FPGA