High performance anti-aliasing filters (AAF) are critical components of advanced frequency interleaved (FI) analog-to-digital converter (ADC) structures, which are capable of overcoming the sample-clock jitter limit for ultra-high speed power efficient ADCs exceeding 100 GS/s as is necessary in future radio frequency systems. Employing printed circuit board (PCB) microstrip filters is a promising approach as they offer a highly precise low-cost solution. In face of the specific requirements of the FI-ADC on the AAF amplitude response, the stepped impedance approach is shown to be much more suitable than other common approaches for wide stop band filters. The solution to neutralizing the spurious pass bands by placing them in the samplers’ mute frequency regions is introduced. Due to the high cutoff frequencies, typically beyond 8GHz, parasitics and lateral resonances become significant however. Hence, a novel compensation method is presented that integrates well with the required amplitude response, by reinterpreting the longitudinal low-Z-sections as individual lateral microstrips. To prove the proposed method, the design, simulation, and physical implementation of such AAFs are carried out in the context of a state-of-the-art beyond-20 GS/s 7 bit sub-ADC core and a baseband processing bandwidth of 7GHz. The measurement results confirm the behavior predicted by the analytical models and EM simulations, and therefore the suitability of the method for designing AAFs for FI-ADCs.