Low Power CMOS Thyristor-Based Relaxation Oscillator with Efficient Current Compensation
Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review
Contributors
Abstract
This paper presents a microwatt voltage-mode relaxation oscillator, whose main innovation is the utilization of CMOS thyristor circuits as decision elements. It provides stable on-chip 140 kHz clock source for ultra-low power autonomous systems. The employment of CMOS thyristors reduces the dynamic power consumption compared to the classical topology, but introduces strong PTAT temperature dependency. This is compensated by a CTAT current reference, which recycles parts of the PTAT bias generation block and therefore relaxes overall chip area and power penalty. The reference start-up time is effectively decreased by a modified start-up circuit, which shortens system power-on. The oscillator excluding the recycled PTAT occupies 0.09 mm2 and draws 907.4 nW from 1.8 V supply, resulting in a Figure-of-Merit of 6.5 nW/kHz. With the PTAT reference accounted, 1.20 μW, 8.6 nW/kHz and 0.11 mm2 were achieved. Measurements show a temperature coefficient of-514.7 ppm/K in the range of-40°C to 85°C with the proposed compensation, achieving an improvement of 5.5 times compared to the simulated uncompensated case. The frequency variation is 2.62 %/V N within supply voltage range of 1.5 V to 2.5 V.
Details
Original language | English |
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Title of host publication | 2021 IEEE Nordic Circuits and Systems Conference, NORCAS 2021 - Proceedings |
Editors | Jari Nurmi, Dag T. Wisland, Snorre Aunet, Kristian Kjelgaard |
Pages | 1-5 |
Number of pages | 5 |
ISBN (electronic) | 9781665407120 |
Publication status | Published - 2021 |
Peer-reviewed | Yes |
External IDs
Scopus | 85123478705 |
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Mendeley | 60b12959-daf4-36fa-80cf-0f99e2ca351d |
Keywords
ASJC Scopus subject areas
Keywords
- CMOS thyristor, Low power, Relaxation oscillator