Layout Verification Using Open-Source Software
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
The design and manufacturing of integrated circuits is an expensive endeavor. The use of open-source software can lower the barrier to entry significantly, especially for smaller companies or startups. In this paper, we look at open-source software for layout verification, a crucial step in ensuring the consistency and manufacturability of a design. We show that a comprehensive design rule check (DRC) and layout versus schematic (LVS) check for commercial technologies is possible with open-source software in general and with KLayout in particular. To facilitate the use of these tools, we present our approach to automatically generate the required DRC scripts from a more abstract representation. As a result, we are able to generate nearly 74% of the over 1000 design rules of X-FABs XH018 180nm technology as a DRC script for the open-source software KLayout. This demonstrates the potential of using open-source software for layout verification and open-source process design kits (PDKs) in general.
Details
| Original language | English |
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| Title of host publication | ISPD '24: Proceedings of the 2024 International Symposium on Physical Design |
| Place of Publication | Taiwan |
| Publisher | Association for Computing Machinery |
| Pages | 137-142 |
| Number of pages | 6 |
| ISBN (electronic) | 9798400704178 |
| ISBN (print) | 979-8-4007-0417-8 |
| Publication status | Published - 12 Mar 2024 |
| Peer-reviewed | Yes |
External IDs
| Scopus | 85188425070 |
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Keywords
ASJC Scopus subject areas
Keywords
- design rule check, klayout, layout versus schematic