Layout Verification Using Open-Source Software

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Abstract

The design and manufacturing of integrated circuits is an expensive endeavor. The use of open-source software can lower the barrier to entry significantly, especially for smaller companies or startups. In this paper, we look at open-source software for layout verification, a crucial step in ensuring the consistency and manufacturability of a design. We show that a comprehensive design rule check (DRC) and layout versus schematic (LVS) check for commercial technologies is possible with open-source software in general and with KLayout in particular. To facilitate the use of these tools, we present our approach to automatically generate the required DRC scripts from a more abstract representation. As a result, we are able to generate nearly 74% of the over 1000 design rules of X-FABs XH018 180nm technology as a DRC script for the open-source software KLayout. This demonstrates the potential of using open-source software for layout verification and open-source process design kits (PDKs) in general.

Details

Original languageEnglish
Title of host publicationISPD '24: Proceedings of the 2024 International Symposium on Physical Design
Place of PublicationTaiwan
PublisherAssociation for Computing Machinery
Pages137-142
Number of pages6
ISBN (electronic)9798400704178
ISBN (print)979-8-4007-0417-8
Publication statusPublished - 12 Mar 2024
Peer-reviewedYes

External IDs

Scopus 85188425070

Keywords

ASJC Scopus subject areas

Keywords

  • design rule check, klayout, layout versus schematic