Integrated circuits for 3D photonic transceivers
Research output: Contribution to book/conference proceedings/anthology/report › Chapter in book/anthology/report › Contributed › peer-review
Contributors
Abstract
In highly integrated and parallel systems, such as multiprocessor environments, network and systems on chip, the interconnection bandwidth becomes the main design bottleneck. Thus, optical inter and intraconnects are seen as a possible solution to realize high-speed data transfer even on short distances as is the case for printed circuit boards, between chips or on chips packaged in a 3D architecture. While such intraconnects require very complex and efficient photonic structures and devices, large parts of such an optical transceiver consist of electrical circuitry. These electronic devices involve de-/multiplexers, driving circuits, amplifiers, and clock-data-recoveries for instance. The requirements for these circuits are demanding. Besides providing a large bandwidth they need to consume as low power as possible to achieve high energy-efficient optical links. Furthermore, the circuits have to be very compact to enable high optical link parallelism. This chapter describes the recent progress of broadband integrated circuit (IC) design for compact high-speed energy-efficient optical intraconnects. Since the data modulation of lasers is one of the challenges to achieve high data rates and high energy efficiency in 3D chip-stacked intraconnects, this chapter focuses on the design of three laser diode driver (LDD) circuits. Moreover, a novel design methodology of vertical inductor structures is described to realize highly compact ICs.
Details
Original language | English |
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Title of host publication | 3D Stacked Chips |
Publisher | Springer International Publishing |
Pages | 297-308 |
Number of pages | 12 |
ISBN (electronic) | 9783319204819 |
ISBN (print) | 9783319204802 |
Publication status | Published - 2016 |
Peer-reviewed | Yes |
External IDs
ORCID | /0000-0002-1851-6828/work/142256653 |
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