For wideband terahertz communications systems the analog-to-digital converter power consumption is expected to become a major challenge. The use of receivers with 1-bit quantization and oversampling w.r.t. the transmit signal bandwidth in combination with zero-crossing modulation is considered as a promising solution to realize energy-efficient wideband communications systems. Such a zero-crossing modulation can be realized using a combination of runlength-limited (RLL) sequences and faster-than-Nyquist signaling. However, the high-speed implementation of the RLL encoding and decoding poses severe challenges due to their inherently serial nature. In the present paper, we present an implementation and synthesis results of an RLL encoder in 22nm FDX CMOS technology, demonstrating that data rates in the order of 100Gbps can be achieved. Moreover, technology scaling shows the potential for even higher throughputs.