High speed low gate leakage large capacitive- load driver circuits for low-voltage CMOS

Research output: Contribution to book/conference proceedings/anthology/reportConference contributionContributedpeer-review

Contributors

  • B. Kheradmand-Boroujeni - , University of Tehran (Author)
  • A. Seyyedi - , University of Tehran (Author)
  • A. Afzali-Kusha - , University of Tehran (Author)

Abstract

In this work, a high-speed full swing driver for large capacitive-loads for low-voltage CMOS applications is presented. The driver which has multi-path for driving the load has a low gate leakage. It works similar to a standard CMOS gate and can be implemented in any CMOS fabrication technology. The circuit does not use extra bootstrap capacitors, has a small effective input capacitance, and can operate in a wide range of supply voltages. Analytical expressions for the sizing of the transistors which should be determined for any load capacitance are also presented. The driver is compared to the previously proposed circuits in a 65 nm CMOS technology using HSPICE simulations. The results show that the circuit operates 20% faster than the previous drivers and its gate leakage is about half of the gate leakage of bootstrap drivers.

Details

Original languageEnglish
Title of host publicationInternational Conference on Microelectronics (ICM) 2005
Pages30-35
Number of pages6
Publication statusPublished - Dec 2005
Peer-reviewedYes
Externally publishedYes

Conference

TitleInternational Conference on Microelectronics 2005
Abbreviated titleICM 2005
Conference number17
Duration13 - 15 December 2005
CityIslamabad
CountryPakistan

External IDs

Scopus 33847132779

Keywords

Research priority areas of TU Dresden