Harnessing memristor circuits and device variability in emergent computing applications

Research output: Types of thesis › Doctoral thesis

Contributors

  • Vasileios Ntinas - , Democritus University of Thrace, UPC Polytechnic University of Catalonia (Barcelona Tech) (Author)

Abstract

Nowadays, due to the increasing amount of information and its demanding processing, conventional CMOS technology and von Neumann computing architecture struggle to keep pace, as they meet their respective limitations either from physical or practical standpoints, i.e. miniaturization limits, increasing costs, heat and energy consumption. In this vein, the memristor comes as a promising candidate to push the limits of recent technology and computing. Memristor devices provide unprecedented features for a single nanoelectronic device, such as non-volatile analog information storage with fast and low power operation. However, memristor devices are still in their infancy, as they are still facing major issues that hinder their wide commercialization. The modeling of their dynamical behavior is still being investigated, and we are far from a standard memristor model that accurately captures the characteristics of fabricated memristor devices considering also numerical stability at large-scale simulations. Also the adjustment of its conductivity arises from intrinsically stochastic processes which result in high variability during the operation of the device, also affecting its functionality within a circuit. Thus, in this thesis, memristor device modeling has been addressed in a two-fold approach. On one hand, working on an existing physics-based memristor model, the necessary mathematical transformations are performed to derive an analytical and transcendental form of the device's dynamical behavior under constant positive and negative stimulus, respectively, enabling the analytical study of the memristor's programming. On the other hand, a probabilistic mathematical framework for stochasticity-aware memristor modeling has been developed based on the master equations of Markov jump processes. The proposed framework captures the probabilistic switching of memristor devices that originates from the device's intrinsic stochasticity, allowing also multi-state stochastic memristor modeling. In circuit level, memristor's stochasticity imposes detrimental variability on the programming of memristor devices. To tackle this problem, I adopted a counter-intuitive approach based on the nonlinear system phenomenon called Stochastic Resonance (SR), which postulates that a properly selected noisy signal can improve the performance of a nonlinear system. Originally, SR was used to enhance the resistance window of a memristor. Then, in this thesis, that phenomenon was studied for a wider variety of memristor models, including device variability, which was also demonstrated with experimental measurements on single memristor devices. A detailed study on the noise-aided programming of a memristor in ReRAM memory cells, either individually or in an array, has been performed, showcasing the power-efficiency of the proposed noise-aided approach as the nominal programming voltage amplitudes can be reduced in the presence of noise without damaging the programming accuracy. The beneficial exploitation of memristor's stochasticity within a novel computing paradigm has been investigated during this thesis. Considering an Emerging Computing setup, the Cellular Automata (CA), memristor devices are incorporated into the CA array to expand CA's abilities, utilizing memristor's probabilistic switching, establishing the novel memristor-based Probabilistic CA (MemPCA). Thus, the effect of memristor into the simplest CA form, Elementary CA, is studied, resulting in the improvement of system entropy for a certain amount of switching probability. Moreover, the first transistor-level implementation of ECA with the all-memristor approach has been performed, with memristor devices participating in both cell and rule modules. The proposed novel MemPCA implementation achieves high operation speed, due to the ultra-fast source of entropy per cell, i.e. the memristor device. MemPCA's functionality is showcased in both deterministic and probabilistic operation.

Details

Original languageEnglish
Qualification levelPh.D.
Awarding Institution
  • UPC Polytechnic University of Catalonia (Barcelona Tech)
  • Democritus University of Thrace
Supervisors/Advisors
  • Rubio, Antonio, Supervisor, External person
  • Sirakoulis, Georgios Ch, Supervisor, External person
Thesis sponsors
  • Spanish State Research Agency (AEI)
Defense Date (Date of certificate)4 Apr 2022
Publication statusPublished - 4 Apr 2022
Externally publishedYes
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External IDs

unpaywall 10.5821/dissertation-2117-413343

Keywords

Sustainable Development Goals