Flip-Break: Breaking Flip-flop-based Logic Locking in Sequential Circuits

Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review

Contributors

  • Transregio 404: Next Generation Electronics With Active Devices in Three Dimensions

Abstract

Machine learning (ML)-based attacks have shown that even the most advanced logic locking methods leave structural traces in circuits due to optimizations of security-agnostic synthesis tools. However, these attacks mainly focus on purely combinational logic locking techniques, like XOR/XNOR-based or MUX-based approaches. To mitigate structural leakages caused by synthesis tools, a novel flip-flop-based approach named Flip-Lock has been introduced. By incorporating sequential elements into locking substructures, this flip-flop-based logic locking approach prevents synthesis optimizations, effectively neutralizing all state-of-the-art structural attacks. This paper demonstrates that while flip-flop-based logic locking effectively mitigates the structural leakages left by synthesis tools; it may introduce flip-flop-relevant structural traces. These traces can reveal distinctions between the added locking flip-flops and the original flip-flops of the circuit. By reframing the problem as flip-flop classification rather than key extraction, we introduce Flip-Break, an Oracle-less Graph Neural Network (GNN)-based attack designed to target flip-flop-based logic locking. Flip-Break reveals that the added secure flip-flops differ from the original flip-flops in their local sub-structures, as they are randomly inserted into the circuit. We show that Flip-Break gains an average accuracy of in breaking add-on flip-flop-based secure layers for various benchmark circuits.

Details

Original languageEnglish
Title of host publicationGLSVLSI 2025 - Proceedings of the Great Lakes Symposium on VLSI 2025
PublisherAssociation for Computing Machinery (ACM)
Pages463-469
Number of pages7
ISBN (electronic)979-8-4007-1496-2
Publication statusPublished - 29 Jun 2025
Peer-reviewedYes

Publication series

SeriesProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Conference

Title35th Great Lakes Symposium on VLSI 2025
Abbreviated titleGLSVLSI 2025
Conference number35
Duration30 June - 2 July 2025
Website
LocationThe Jung Hotel New Orleans
CityNew Orleans
CountryUnited States of America

Keywords

Research priority areas of TU Dresden

ASJC Scopus subject areas

Keywords

  • Flip-Flop-based Logic Locking, GNN, Structural attacks