Fast Switching Serial and Parallel Paradigms of SNN Inference on Multi-Core Heterogeneous Neuromorphic Platform SpiNNaker2

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Abstract

With serial and parallel processors introduced into Spiking Neural Networks (SNNs) execution, more and more researchers are dedicated to improving the performance of the computing paradigms by taking full advantage of the strengths of the available processor. In this paper, we compare and integrate serial and parallel paradigms into one SNN compiling system. For a faster switching between them in the layer granularity, we train the classifier to prejudge a better paradigm before compiling instead of making the decision afterward, saving a great amount of compiling time and RAM space on the host PC. The classifier Adaptive Boost, with the highest accuracy (91.69 %) among 12 classifiers, is integrated into the switching system, which utilizes less memory and processors on the multi-core neuromorphic hardware backend SpiNNaker2 than two individual paradigms. To the best of our knowledge, it is the first fast-switching compiling system for SNN simulation.

Details

Original languageEnglish
Title of host publication2024 International Conference on Neuromorphic Systems (ICONS)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages117-123
Number of pages7
ISBN (electronic)979-8-3503-6865-9
ISBN (print)979-8-3503-6866-6
Publication statusPublished - 2 Aug 2024
Peer-reviewedYes

Conference

Title2024 International Conference on Neuromorphic Systems
Abbreviated titleICONS 2024
Duration30 July - 2 August 2024
Website
LocationGeorge Mason University & Online
CityArlington
CountryUnited States of America

External IDs

Scopus 85214709125

Keywords

Keywords

  • Accuracy, Hardware, Memory management, Neuromorphics, Program processors, Random access memory, Spiking neural networks, Supercomputers, Switches, Switching systems, heterogeneous hybrid processor computing, high-performance computing, neuromorphic compiler, SNN, SpiNNaker2, workload partitioning