Fast integer compression using SIMD instructions

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Contributors

Abstract

We study algorithms for efficient compression and decompression of a sequence of integers on modern hardware. Our focus is on universal codes in which the codeword length is a monotonically non-decreasing function of the uncompressed integer value; such codes are widely used for compressing "small integers". In contrast to traditional integer compression, our algorithms make use of the SIMD capabilities of modern processors by encoding multiple integer values at once. More specifically, we provide SIMD versions of both null suppression and Elias gamma encoding. Our experiments show that these versions provide a speedup from 1.5x up to 6.7x for decompression, while maintaining a similar compression performance.

Details

Original languageEnglish
Title of host publicationDaMoN '10: Proceedings of the Sixth International Workshop on Data Management on New Hardware
Pages34-40
Number of pages7
Publication statusPublished - 2010
Peer-reviewedYes

Conference

Title6th International Workshop on Data Management on New Hardware, DaMoN 2010, in Conjunction with ACM SIGMOD/PODS Conference
Duration7 June 2010
CityIndianapolis, IN
CountryUnited States of America

External IDs

ORCID /0000-0001-8107-2775/work/201623401

Keywords

Research priority areas of TU Dresden

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