Skip to content Skip to footer

Research Portal of the TU Dresden

Exploration of FPGA architectures for tight coupled accelerators in a 22nm FDSOI technology

Research output: Contribution to conferences › Paper › Contributed › peer-review

Contributors

Heiner Bauer - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Sebastian Höppner - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Johannes Partzsch - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Dennis Walter - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Christian Mayr - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
Florian Schraut - , Racyics GmbH (Author)
Holger Eisenreich - , Racyics GmbH (Author)

Details

Original language	English
Number of pages	6
Publication status	Published - 2017
Peer-reviewed	Yes

Conference

Title	2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
Abbreviated title	NORCAS 2017
Conference number
Duration	23 - 25 October 2017
Location	Linköping Konsert & Kongress
City	Linkoping
Country	Sweden

External IDs

ORCID	/0000-0002-6286-5064/work/142240653
Scopus	85045741488

Keywords

Keywords

FDSOI, FPGA architecture, application specific processors, instruction set extensions, reconfigurable computing