Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack
Research output: Contribution to conferences › Paper › Contributed › peer-review
Contributors
Abstract
AMD's Advanced Synchronization Facility (ASF) is an x86 instruction set extension proposal intended to simplify and speed up the synchronization of concurrent programs. In this paper, we report our experiences using ASF for implementing transactional memory. We have extended a C/C++ compiler to support language-level transactions and generate code that takes advantage of ASF. We use a software fallback mechanism for transactions that cannot be committed within ASF (e.g., because of hardware capacity limitations). Our evaluation uses a cycle-accurate x86 simulator that we have extended with ASF support. Building a complete ASF-based software stack allows us to evaluate the performance gains that a user-level program can obtain from ASF. Our measurements on a wide range of benchmarks indicate that the overheads traditionally associated with software transactional memories can be significantly reduced with the help of ASF.
Details
Original language | English |
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Pages | 27-40 |
Number of pages | 14 |
Publication status | Published - 2010 |
Peer-reviewed | Yes |
Conference
Title | EuroSys '10: Proceedings of the 5th European conference on Computer systems |
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Abbreviated title | EuroSys '10 |
Conference number | |
Duration | 13 - 16 April 2010 |
Website | |
Degree of recognition | International event |
Location | |
City | Paris |
Country | France |
External IDs
Scopus | 77954573319 |
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Keywords
Research priority areas of TU Dresden
DFG Classification of Subject Areas according to Review Boards
Keywords
- Transactional Memory