Enhancing Robustness and Reliability of Networks-on-Chip with Network Coding

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Abstract

Recently, Network-on-Chip (NoC) has become the standard for modern communication infrastructures in Multiprocessor System-on-Chip (MPSoC), due to scalability issues in this area. However, such embedded systems are vulnerable to security threats such as the extraction of confidential information and are susceptible to faults. In this paper, we consider malicious routers within the NoC and focus mainly on improving the efficiency, robustness, and reliability of the communication based on a secure communication protocol with authenticated encryption. We use random linear network coding with a generation-based approach, and evaluate its efficiency using PANACA, a cycle-level NoC simulation platform written in SystemC TLM. Finally, we were able to show that the robustness and reliability of the NoC communication was increased up to 10%, even when 8 attackers are present.

Details

Original languageEnglish
Title of host publication2023 IEEE Nordic Circuits and Systems Conference (NorCAS)
EditorsJari Nurmi, Peeter Ellervee, Peter Koch, Farshad Moradi, Ming Shen
Pages1-7
ISBN (electronic)979-8-3503-3757-0
Publication statusPublished - 6 Nov 2023
Peer-reviewedYes

Conference

Title2023 IEEE Nordic Circuits and Systems Conference
Abbreviated titleNorCAS 2023
Duration30 October - 1 November 2023
Website
Degree of recognitionInternational event
LocationAAU Innovate Building
CityAalborg
CountryDenmark

External IDs

ORCID /0009-0001-5085-8166/work/159605764
ORCID /0000-0003-2571-8441/work/159607517
ORCID /0000-0002-8604-0139/work/159607782
Scopus 85179523436

Keywords

Keywords

  • MPSoC, Network-on-Chip, Random Linear Network Coding, Security, Simulation, SystemC TLM