Coarse-Grained Reconfigurable Architectures (CGRAs) are promising solutions to achieve more performance with the end of Moore's law. Thanks to word-level programmability, they are more energy-efficient compared to FPGAs. Although ASICs can minimize energy, they suffer from high Non-Recurring Engineering (NRE) costs and inflexibility. CGRAs provide near ASIC energy efficiency and are deployed in the literature to accelerate low-power and high-performance applications. However, focusing on low-power CGRAs is crucial as a high volume of data should be processed on a resource-constrained device by the development of IoT and Machine Learning applications. This survey has reviewed and categorized CGRA architectures from processing elements, interconnect networks, and memory points of view and derived guidelines for energy-efficient CGRA design.