Embedded Security Accelerators within Network-on-Chip Environments

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

Abstract

The adoption of Network-on-Chip (NoC) as the backbone for Multiprocessor System-on-Chip (MPSoC) communications is becoming increasingly common due to its scalability. Nevertheless, the vulnerability of these systems to security exploits, particularly from third-party components that may be embedded with Hardware Trojans (HTs), poses a significant threat. These Hardware Trojanss (HTss) can facilitate unauthorized eavesdropping and data extraction, compromising sensitive information. Our work introduces Embedded Security Accelerator (ESA) that encrypt and authenticate outgoing traffic from Processing Elements (PEs) to network routers of the Networks-on-Chip (NoCs), using the lightweight crypto algorithm PRINCE enhancing data integrity and confidentiality against network-based attacks. This approach ensures secure data transmission and minimizes the risks associated with Hardware Trojans (HTs) with manageable costs regarding FPGA resources and acceptable power increase.

Details

Original languageEnglish
Title of host publicationInternational Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2024
Pages37-43
Number of pages7
Edition14
ISBN (electronic)9798400717277
Publication statusAccepted/In press - 3 May 2024
Peer-reviewedYes

External IDs

Scopus 85197792586

Keywords

Keywords

  • Embedded Security Accelerator, Lightweight Encryption, MPSoC, Network-on-Chip, Security