Instruction-Level Redundancy (ILR) is a well
known approach to tolerate transient CPU faults. It replicates
instructions in a program and inserts periodic checks to detect
and correct CPU faults using majority voting, which essentially
requires three copies of each instruction and leads to high
performance overheads. As SIMD technology can operate
simultaneously on several copies of the data, it appears to be
a good candidate for decreasing these overheads. To verify this
hypothesis, we propose ELZAR, a compiler framework that
transforms unmodified multithreaded applications to support
triple modular redundancy using Intel AVX extensions for
vectorization. Our experience with several benchmark suites and
real-world case-studies yields mixed results: while SIMD may
be beneficial for some workloads, e.g., CPU-intensive ones with
many floating-point operations, it exposes higher overhead than
ILR in many applications we tested