Efficient STT-RAM last-level-cache architecture to replace DRAM cache
Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review
Contributors
Abstract
Recent research has proposed die-stacked Last Level Cache (LLC) to overcome the Memory Wall. Lately, Spin-Transfer-Torque Random Access Memory (STT-RAM) caches have been recommended as they provide improved energy efficiency compared to DRAM caches. However, the recently proposed STT-RAM cache architecture unnecessarily dissipates energy by fetching unneeded cache lines into the row buffer. In this paper, we propose a Selective Read Policy for STT-RAM.This policy only fetches those cache lines into the row buffer that are likely to be reused. This reduces the number of cache line reads and thereby reduces the energy consumption. Further, we propose two key performance optimizations namely Row Buffer Tags Bypass Policy and LLC Data Cache. Both optimizations reduce the LLC access latency and therefore improve the overall performance. For evaluation, we implement our proposed architecture in the Zesto simulator and run different combinations of SPEC2006 benchmarks on an 8-core system. We show that our synergetic policies reduce the average LLC dynamic energy consumption by 72.6% and improve the system performance by 1.3% compared to the recently proposed STT-RAM LLC. Compared to the state-of-theart DRAM LLC, our architecture reduces the LLC dynamic energy consumption by 90.6% and improves system performance by 1.4%.
Details
Original language | English |
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Title of host publication | MEMSYS 2017 - Proceedings of the International Symposium on Memory Systems |
Publisher | Association for Computing Machinery (ACM), New York |
Pages | 141-151 |
Number of pages | 11 |
ISBN (electronic) | 9781450353359 |
Publication status | Published - 2 Oct 2017 |
Peer-reviewed | Yes |
Conference
Title | 2017 International Symposium on Memory Systems, MEMSYS 2017 |
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Duration | 2 - 5 October 2017 |
City | Washington |
Country | United States of America |
External IDs
ORCID | /0000-0002-5007-445X/work/141545557 |
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