Communication and migration energy aware design space exploration for multicore systems with intermittent faults

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Anup Das - , National University of Singapore (Author)
  • Akash Kumar - , National University of Singapore (Author)
  • Bharadwaj Veeravalli - , National University of Singapore (Author)

Abstract

Shrinking transistor geometries, aggressive voltage scaling and higher operating frequencies have negatively impacted the dependability of embedded multicore systems. Most existing research works on fault-tolerance have focused on transient and permanent faults of cores. Intermittent faults are a separate class of defects resulting from on-chip temperature, pressure and voltage variations and lasting for a few cycles to several seconds or more. Operations of cores impacted by intermittent faults are suspended during these cycles but come back alive when conditions become favorable. This paper proposes a technique to model the availability of multiprocessor systems-on-chip (MPSoCs) with intermittent and reparable device defects. This model is based on Markov chain with stochastic fault distribution and can be applied even for permanent faults. Based on this model, a design space pruning technique is proposed to select a set of task mappings (with variable resource usage), which minimizes the task communication energy while satisfying the MPSoC availability constraint. Moreover, task migration overhead is also minimized, which is an important consideration for frequently occurring intermittent and temperature related faults, where prolonged system downtime during task re-mapping is not desired. Experiments conducted with real-life and synthetic application task graphs demonstrate that the proposed technique minimizes communication energy by 30% and reduces migration overhead by 50% as compared to the existing approaches.

Details

Original languageEnglish
Title of host publication2013 Design, Automation & Test in Europe Conference & Exhibition (DATE)
PublisherIEEE, New York [u. a.]
Pages1631-1636
Number of pages6
ISBN (electronic)978-3-9815370-0-0
ISBN (print)978-1-4673-5071-6
Publication statusPublished - 2013
Peer-reviewedYes
Externally publishedYes

Publication series

SeriesDesign, Automation and Test in Europe Conference and Exhibition (DATE)
ISSN1530-1591

Conference

Title16th Design, Automation and Test in Europe Conference and Exhibition, DATE 2013
Duration18 - 22 March 2013
CityGrenoble
CountryFrance

Keywords

Research priority areas of TU Dresden

ASJC Scopus subject areas