Chaotic Circuit Design Leveraging the Analog Nonlinear Dynamics of a Self-Rectifying Memristor

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

Abstract

Memristive devices have attracted significant attention due to their intrinsic nonlinearity, memory-dependent behavior, and ability to encode information through continuously tunable resistive states at the nanoscale. Beyond its use in non-volatile memories and neuromorphic architecture, the memristor is increasingly investigated for chaotic and nonlinear circuit design, where its analog hysteretic response can enable compact and energy-efficient chaotic systems. To date, memristor-based chaotic circuit designs have predominantly focused on binary (abrupt-switching) devices, while analog (gradual-switching) memristors, despite their advantages such as low operating current and high reproducibility, have not yet been explored for their potential to generate and sustain chaotic behavior. In this work, we use a self-rectifying BiFeO3 (BFO) memristor as a demonstrator to investigate how analog nonlinear dynamics can be harnessed for chaotic RC oscillator design. Based on experimental characterization of its frequency-dependent response, a physically grounded behavioral model is developed to accurately capture the device’s analog and self-rectifying characteristics, showing excellent agreement with measured data. Using this model, we adapt a low-frequency third-order RC chaotic circuit from the literature by replacing its diode with the BFO memristor and its parasitic capacitance, where the BFO device serves as the single nonlinear element responsible for chaotic signal generation. More importantly, the circuit parameters must be finely tuned to match the analog nonlinear dynamics of the BFO memristor with the RC network and ensure stable chaotic operation, ultimately yielding a fifth-order memristive oscillator. The proposed circuit exhibits rigorous chaos, as confirmed by Lyapunov exponent analysis, features a double-scroll attractor, and demonstrates a broad parameter range of chaotic behavior verified through bifurcation diagram analysis. This work represents the demonstration of chaos generation by leveraging, for the first time, the analog nonlinear dynamics in a self-rectifying memristor, establishing a direct link between device-level nonlinear dynamics and system-level chaotic behavior, and providing a technology-agnostic framework for the development of low-power, scalable chaotic circuits applicable to diverse applications.

Details

Original languageEnglish
Pages (from-to)269-281
Number of pages13
JournalIEEE Open Journal of Circuits and Systems
Volume7
Publication statusPublished - 2026
Peer-reviewedYes

External IDs

ORCID /0000-0002-1236-1300/work/214453680
Scopus 105038387646

Keywords