AVGS-Mux style: A novel technology and device independent technique for reducing power and compensating process variations in FPGA fabrics

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • B. Kheradmand-Boroujeni - , Swiss Center for Electronics and Microtechnology (CSEM), Swiss Federal Institute of Technology Lausanne (EPFL) (Author)
  • C. Piguet - , Swiss Center for Electronics and Microtechnology (CSEM) (Author)
  • Y. Leblebici - , Swiss Federal Institute of Technology Lausanne (EPFL) (Author)

Abstract

This work presents Adaptive Vgs Multiplexer (AVGS-Mux) Technique. Proposed method controls the transistor current by the source voltage. It can provide ±1.6X control on the delay and ±7X exponential control on sub-threshold and gate leakages in the switch-box, LUT, and interconnects. For equal leakage, it improves the speed 9%, reduces dynamic power 13%, and reduces random dopant fluctuations effect. AVGS-Mux is a good replacement of adaptive body biasing and adaptive supply voltage techniques in emerging Multi-Gate devices which have very small body effect and cannot tolerate voltages higher than nominal VDD due to reliability issues.

Details

Original languageEnglish
Title of host publicationDesign, Automation & Test in Europe Conference & Exhibition (DATE) 2010
Pages339-344
Number of pages6
Publication statusPublished - 2010
Peer-reviewedYes
Externally publishedYes

Conference

Title2010 Design, Automation and Test in Europe Conference and Exhibition
Abbreviated titleDATE 2010
Conference number13
Duration8 - 12 March 2010
Website
CityDresden
CountryGermany

External IDs

Scopus 77953102409

Keywords

Research priority areas of TU Dresden