Application-aware spinlock control using a hardware scheduler in MPSoC platforms
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
Spinlocks are a common technique in Multi-Processor Systems-on-Chip (MPSoCs) to protect shared resources and prevent data corruption. Without a priori application knowledge, the control of spinlocks has high randomness which can degrade the system performance significantly. This paper presents a centralized control mechanism of spinlocks by using a hardware scheduler called OSIP, that increases system performance by utilizing application-specific information. A complete spinlock control flow, starting from integrating high-level user-defined information down to a low-level realization of the control, is introduced. Two case studies demonstrate the high efficiency of this mechanism.
Details
Original language | English |
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Title of host publication | 2012 International Symposium on System on Chip, SoC 2012 |
Publication status | Published - 2012 |
Peer-reviewed | Yes |
Externally published | Yes |
Conference
Title | 2012 International Symposium on System on Chip, SoC 2012 |
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Duration | 10 - 12 October 2012 |
City | Tampere |
Country | Finland |
External IDs
ORCID | /0000-0002-5007-445X/work/141545595 |
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