Application-aware spinlock control using a hardware scheduler in MPSoC platforms

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Diandian Zhang - , RWTH Aachen University (Author)
  • Li Lu - , RWTH Aachen University (Author)
  • Jeronimo Castrillon - , RWTH Aachen University (Author)
  • Torsten Kempf - , RWTH Aachen University (Author)
  • Gerd Ascheid - , RWTH Aachen University (Author)
  • Rainer Leupers - , RWTH Aachen University (Author)
  • Bart Vanthournout - , Synopsys Inc. (Author)

Abstract

Spinlocks are a common technique in Multi-Processor Systems-on-Chip (MPSoCs) to protect shared resources and prevent data corruption. Without a priori application knowledge, the control of spinlocks has high randomness which can degrade the system performance significantly. This paper presents a centralized control mechanism of spinlocks by using a hardware scheduler called OSIP, that increases system performance by utilizing application-specific information. A complete spinlock control flow, starting from integrating high-level user-defined information down to a low-level realization of the control, is introduced. Two case studies demonstrate the high efficiency of this mechanism.

Details

Original languageEnglish
Title of host publication2012 International Symposium on System on Chip, SoC 2012
Publication statusPublished - 2012
Peer-reviewedYes
Externally publishedYes

Conference

Title2012 International Symposium on System on Chip, SoC 2012
Duration10 - 12 October 2012
CityTampere
CountryFinland

External IDs

ORCID /0000-0002-5007-445X/work/141545595

Keywords