An MPSoC for Energy-Efficient Database Query Processing
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
This paper presents a heterogeneous database hardware accelerator MPSoC manufactured in 28 nm SLP CMOS. The 18 mm2 chip integrates a runtime task scheduling unit for energy-efficient query processing and hierarchical power management supported by an ultra-fast dynamic voltage and frequency scaling. Four processing elements, connected by a star-mesh network-on-chip, are accelerated by an instruction set extension tailored to fundamental data-intensive applications. We evaluate the MPSoC with typical database benchmarks focusing on scans and bitmap operations. When the processing elements operate on data stored in local memories, the chip consumes 250 mW and shows a 96x energy efficiency improvement compared to state-of-the-art platforms.
Details
Original language | English |
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Title of host publication | Proceedings of the 53rd Annual Design Automation Conference, DAC 2016 |
Place of Publication | Austin, Texas |
ISBN (electronic) | 978-1-4503-4236-0 |
Publication status | Published - 1 Jun 2016 |
Peer-reviewed | Yes |
Publication series
Series | Proceedings - Design Automation Conference |
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Volume | 05-09-June-2016 |
ISSN | 0738-100X |
External IDs
Scopus | 84977090771 |
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