In this paper, we present a simple analytical delay model for memristive memory cells. The output voltage evolution is obtained analyzing the charge-flux dynamics when a voltage ramp is applied to the input. From this evolution, the propagation delay is calculated. The model is validated using the VTEAM memristor model for different input rise time values of the applied ramp. The proposed model can be used for accurate estimations of the dynamic behavior of huge ReRAM circuits when included in event-driven simulators.