An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
This paper presents an all-digital pulse width modulator (PWM) for application in integrated DC-DC converters. Based on a multi-phase clock signal a PWM resolution of 62.5ps is achieved, resulting in up to 16-Bit PWM resolution at 4096ns period. The PWM signal duty cycle and period can be arbitrarily changed within a single cycle which allow efficient alldigital implementation of spread spectrum clocking schemes. The circuit has been implemented in 28nm SLP CMOS technology. It consumes 0.3mW when operating from a 1.0V supply.
Details
| Original language | English |
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| Title of host publication | 2015 IEEE International Symposium on Circuits and Systems (ISCAS) |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Pages | 1738-1741 |
| Number of pages | 4 |
| ISBN (electronic) | 978-1-4799-8391-9 |
| Publication status | Published - 1 May 2015 |
| Peer-reviewed | Yes |
Publication series
| Series | IEEE International Symposium on Circuits and Systems (ISCAS) |
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| ISSN | 0271-4302 |
External IDs
| Scopus | 84946235575 |
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Keywords
Keywords
- CMOS integrated circuits, CMOS technology, Clocks, Generators, Pulse width modulation, Signal resolution, System-on-chip, ADPLL, PWM generator DC-DC converter, power management