FPGAs are highly promising for robotics due to their parallel and reconfigurable nature, making them ideal for demanding tasks such as perception, control, and path planning. However, the limited resources of mobile embedded systems face severe challenges when processing complex missions. Virtualization and dynamic partial reconfiguration technology enable the system to flexibly manage and reconfigure hardware resources according to task properties. These mechanisms create spatial and temporal separation between tasks, thereby preventing mutual interference and improving overall system security. To improve the performance and resource utilization in multi-task coordination in robotics, this paper proposes a hardware-level unified resource management architecture that integrates adaptive scheduling with direct memory access and memory virtualization. The framework explicitly supports accelerator sharing and leverages dynamic partial reconfiguration for on-demand task reconfiguration. Our approach employs a dynamic scheduling layer that transparently and adaptively allocates hardware resources according to task requirements in a spatiotemporal manner. The system is complemented by strict access rights management to ensure security and isolation. Compared to a non-scheduling system, the hardware scheduling system decreases the task rejection rate by 83.3%, while ensuring task data remains disjoint.