This work is focusing on evaluation of 90/65nm CMOS technology for active photo sensor arrays and analog/mixed signal readout circuits. To compensate for the expected larger insufficiencies of the analog sensor array, advantage can be taken of the shrinking potential of further sub-100nm CMOS technologies to implement image enhancement techniques by digital post processing. Application is aimed at embedded imagers for digital cameras in handhelds and alike, using standard digital processes for Systems on Chip. As far as the authors are aware, this is the first study of pixel sensors in sub-100nm CMOS technologies.