The inclusion of access networks in modern FPGAs can provide a large number of use cases notably in debugging. Using access networks can eliminate the need for frequent synthesis during the debugging phase, which results in saving debugging time and reducing the time to market. Using supervisory control by a processor, required networks can be configured just by minor software modification. Furthermore, connecting thousands of nodes to the debugging system is also a complicated issue. Utilizing IP-XACT files for automatic network generation can solve such problems. A Tcl file can then be used which can perform automatic network generation. This paper demonstrates an access network design, which requires only small resources and hence is suitable for large designs along with a framework for automatic connectivity generation.